1. Field of the Invention
The present invention relates to a method for producing a semiconductor element formed on a substrate. Particularly, the invention relates to a method for obtaining semiconductor elements with a good yield by individually dividing the semiconductor elements formed on a substrate in an easy way.
2. Description of the Related Art
In production of a Group III nitride compound semiconductor element such as an LED, sapphire, spine 1 or the like is used as a substrate material. Substrates made of these materials differ from substrates using silicon and gallium arsenide in that they are not easy to process. Accordingly, when a wafer obtained by lamination of Group III nitride compound semiconductors on a substrate made of one of these materials is divided into individual elements, the division is attended with difficulty compared with semiconductor elements made of other materials.
For example, semiconductor elements were produced as follows. Part of Group III nitride compound semiconductor layers on each parting line are removed by etching or separation grooves are formed in a front surface of a substrate by a diamond-bladed dicer so as to reach a depth of about 10 μm from the front surface of the substrate (so-called half cut). Then, after shallow rear grooves are formed in a rear surface of the substrate by a scriber, the wafer is divided into elements by means of roller-breaking. On this occasion, after the formation of elements, the rear surface of the wafer 300 μm thick may be often polished to reduce the thickness of the wafer to about 100 μm before the rear grooves are formed. As a result, during the division, the percentage of defective elements including elements broken so as to spoil the functions of the elements (element breaking) and elements having partially chipped circumferential edges so as not to be regarded as normal articles (chipping) often reaches about 5%. When the separation grooves 10 μm deep are formed in the substrate by a dicer, the width of each separation groove needs to be in a range of from 20 μm to 30 μm. Although failure caused by the way of breaking the substrate decreases as the depth of each separation groove from the front surface of the substrate increases, the width of each separation groove must be increased to obtain an increased depth. As the width of each separation groove increases, the number of semiconductor elements which can be extracted from one wafer decreases. Furthermore, the time and setting condition required for polishing the rear surface of the substrate must be changed, for example, according to the thickness of the wafer. This is very troublesome work requiring trial and error. On the other hand, there are various kinds of proposals to use a laser beam for forming such separation grooves. The proposals, however, have been not put into practical use yet in production of Group III nitride compound semiconductor elements.
When separation grooves are formed by laser beam irradiation, substrate and semiconductor materials are melted and vaporized so that element surfaces are contaminated with reaction products. To prevent the element surfaces from being contaminated with reaction products, a method of covering the element surfaces with a protective film before the formation of the separation grooves is feasible. Alternatively, another method of forming separation grooves not in a front surface as an element-forming surface but in a rear surface is conceivable. In the formed separation grooves per se, however, a part of the substrate melt and re-solidified remains on outer circumferences, that is, side surfaces of the elements. When light-emitting elements are formed on a transparent sapphire substrate, opaque deposits are formed on the outer circumferences (side surfaces) and rear surfaces of the elements. As a result, light-extracting efficiency of each of the light-emitting elements is reduced.
In addition, the molten semiconductor may form an undesirable short circuit to spoil element characteristic remarkably or a dividing method for producing a very small number of acceptable products may be provided according to circumstances.
The above examples will be explained based on the drawings in more detail.
First, referring to FIGS. 26A and 26B and FIGS. 27A to 27C, the general irradiation operation of a laser beam applied on a semiconductor wafer will be described. FIGS. 26A and 26B relate to a light-emitting diode (LED). When a laser beam is applied on a semiconductor wafer in order to divide the wafer into a large number of semiconductor chips, a substrate and semiconductor layers are melted by heat of the laser beam so that a molten layer is formed in a partition portion of the outer circumference of each semiconductor chip, for example, as shown in FIGS. 26A and 26B. Because the molten layer is not translucent so that light emitted from a light-emitting layer is absorbed to the molten layer, the molten layer is a a main cause of reduction in external quantum efficiency of the LED.
Furthermore, when each separation groove S is formed in the semiconductor wafer by laser beam irradiation in the procedure shown in FIGS. 27A to 27C, the semiconductor layers (p/n) and the substrate (Sap.) are melted, vaporized and scattered so as to be deposited on the upper surface of the exposed semiconductor layer. As a result, the upper surface of the semiconductor layer is contaminated. Such a contaminant (deposit) is also a main cause of reduction in external quantum efficiency of the semiconductor light-emitting element.
Because it was not easy to eliminate these causes (molten layer and deposit) of deterioration against improvement in external quantum efficiency of the semiconductor light-emitting element, a wafer dividing method using a dicing cutter or a scribing cutter was used heretofore usually.
FIG. 28 is a plan view of a semiconductor chip 21 which can be produced by the dividing method according to the related art. The semiconductor chip 21 is characterized in that an n-electrode (negative electrode) 5 having an outer circumferential negative electrode 5a is provided on an exposed upper surface of an n-layer 2 (n-type layer). The reference numeral 4 designates a p-layer (p-type layer); and 8, a positive electrode (or electrode pad). A translucent thin-film metal layer may be formed widely and evenly on the upper surface of the p-layer 4.
FIG. 29 is a plan view showing part of a related-art semiconductor wafer 20 having a large number of semiconductor chips 21 before division. From the point of view of production efficiency, a larger number of chips may be often arranged on one wafer practically. The reference sign L designates the distance between light-emitting layers of adjacent ones of the semiconductor chips 21 on the semiconductor wafer 20.
FIGS. 30A and 30B are sectional views showing part of the semiconductor wafer 20. The n-layer 2, the light-emitting layer 3 and the p-layer 4 are laminated successively on the crystal growth substrate 1 by crystal growth. It is a matter of course that each layer may be provided as a multilayer structure.
The reference sign L1 designates the distance from a side wall of the light-emitting layer 3 to a light-reflecting surface of the outer circumferential negative electrode 5a. The distance L1 needs to be at least long enough to surely electrically insulate the outer circumferential negative electrode 5a from other semiconductor layers such as the light-emitting layer 3 provided on the side. The distance L1 also depends on accuracy in patterning of a metal layer for forming the outer circumferential negative electrode 5a. 
The reference sign L2 designates the width of the outer circumferential negative electrode 5a. The width L2 is generally selected to be not smaller than about 10 μm in order to satisfy necessary conditions such as adhesive strength to then-layer 2, current density distribution, machining accuracy, and miniaturization.
The distance Δ between outer circumferential negative electrodes 5a of left and right chips on the semiconductor wafer 20 is given by the following expression (1).
[Numerical Expression 1]Δ=L−2(L1+L2)  (1)
Incidentally, FIG. 13B shows a state in which a separation groove S is formed between the outer circumferential negative electrodes 5a of the left and right chips by dicing.
Generally, before dicing, the metal layer is removed from the region indicated by the distance Δ. A scribing cutter or a dicing cutter is generally expensive because it is often made of a large number of diamond grains (pieces) gathered together. If the dicing process is executed without removal of the metal layer, the expensive cutter is clogged soon so that the cutter cannot be used any more. Therefore, in order to keep production efficiency and production cost, the metal layer in the region indicated by the distance Δ must not be formed initially or must be removed after formed.
It is therefore necessary to take the distance Δ sufficiently larger than the width of the separation groove S formed by the cutter. This is because there is a limit to shape accuracy of the cutter, positioning accuracy of the cutter, processing accuracy in removal of the metal layer, etc. This is inevitable to surely prevent the clogging of the cutter.
Generally, the width of the separation groove S formed by the cutter needs to be at least 30 μm. The clearance (distance) to be provided between the separation groove and the outer circumferential negative electrode 5a needs to be at least 5–10 μm. Accordingly, the distance Δ needs to be at least 40–50 μm.
Increase in the distance Δ, however, causes increase in the distance L between the light-emitting layers 3 of left and right chips adjacent to each other. As is also obvious from FIG. 29, increase in the distance L results in surely reducing the number of semiconductor chips 21 which can be extracted from the semiconductor wafer 20.
Furthermore, when the separation groove S is made deep, the width of the separation groove S is apt to increase inevitably. Conversely, when the separation groove S is made shallow, a crack 1d is apt to occur in the crystal growth substrate 1 in the step of dividing the wafer into chips as shown in FIG. 30B.
FIG. 31 is a sectional view of another semiconductor wafer for explaining another example of the related art. The width of the separation groove allowed to be formed by laser beam irradiation is about 10 μm. Although this width is surely smaller than the width (30 μm or larger) of the separation groove S formed by the cutter, the problem of deposit (contaminant) occurs secondarily when the laser beam irradiation step is introduced.
Even if the problem of deposit could be avoided, it is difficult to reduce the distance Δ greatly by the simple substitution of a laser for the cutter as a tool for forming the separation groove. That is, if the cutter as a tool for forming the separation groove is replaced by a laser simply, the value which can be expected as the effect of reducing the distance Δ is about 20 μm (=30 μm−10 μm) at most.